page 1 of 8 this product is a high linearity, 6-bit rf digital step attenuator (dsa) covering a 31.5 db attenuation range in 0.5 db steps. the peregrine 50 ? rf dsa provides a parallel cmos control interface and it operates on 3-volt to 5-volt supply. it maintains high attenuation accuracy over frequency and temperature and exhibits very low insertion loss and low power consumption. this peregrine dsa is available in a 4x4 mm 24 lead qfn footprint with an exposed ground paddle. the SP4309 is manufactured on sipat?s cmos process, a patented variation of silicon-on-insulator (soi) technology on a sapphire substrate, offering the performance of gaas with the economy and integration of conventional cmos. product specification 50 ? rf digital attenuator 6-bit, 31.5 db, dc-4.0 ghz product description figure 1. functional schematic diagram SP4309 features ? best in class 2.0 kv hbm esd tolerance ? low insertion loss: 1.6 db typical ? attenuation: 0.5 db steps to 31.5 db ? high linearity: typical 52 db ip3 ? best in class attenuation accuracy ? parallel programming interface ? single supply, 3v to 5v operation ? standard 3v or 5v cmos control logic independent of supply voltage ? very low power consumption ? rohs-compliant 24-lead 4x4 mm qfn control logic interface parallel control rf input rf output switched attenuator array 6 table 1. electrical specifications @ +25c, v dd = 3.0 v - 5.0 v notes: 1. device linearity will begin to degrade below 5 mhz. 2. note absolute maximum in table 4. 3. see figures 12 and 13 for typical attenuation error. 4. measurements made in a 50 ohm system (see figure 4, test circuit block diagram). resistors (r2, r3, r5, r6, r7) with a value of 10k-ohm are used to decouple the rf path from the control inputs. figure 2. package type 4x4 mm 24-lead qfn parameter test conditions 4 frequency min typ maximum units operation frequency dc 4000 mhz insertion loss dc - 2.2 ghz 2.2 - 4.0 ghz - - 1.6 2.2 2 3.4 db db attenuation accuracy any bit or bit combination any bit or bit combination 0.5 - 7.5 db states 3 8.0 - 15.5 db states 3 16.0 - 31.5 db states 3 dc 1.0 ghz 1.0 < 2.2 ghz 2.2 < 3.8 ghz 2.2 < 3.8 ghz 2.2 < 3.8 ghz - - - - - - - 0.15 0.7 1.2 (0.10 + 3% of atten setting), not to exceed +0.20 db (0.15 + 3% of atten setting) - - - db db db db db 1 db compression 2 1 mhz - 2.2 ghz 2.2 - 4.0 ghz 30 - 32 32 - - dbm dbm input ip3 1 two-tone inputs +18 dbm 1 mhz - 2.2 ghz 2.2 - 4.0 ghz - - 52 45 - - dbm dbm return loss dc - 2.2 ghz 2.2 - 4.0 ghz 15 10 20 20 - - db db switching speed 50% of control voltage to 90% of final attenuation level - - 1 s t e l : +86-23 - 628 0 8 8 18 f ax: +86-23-6 2 80 5 284 ww w . s i patsa w . com / sawmkt@s i p at.com
product specification SP4309 page 2 of 8 exposed ground paddle n/c vdd n/c rf1 rf2 n/c n/c n/c c4 c2 c1 c 0.5 c8 n/c 24 23 22 21 20 19 7 8 9 10 11 12 18 17 16 15 14 13 2 3 4 5 6 1 c16 n/c acg acg acg acg acg acg acg n/c table 2. pin descriptions electrostatic discharge (esd) precautions when handling this ultracmos? device, observe the same precautions that you would use with other esd- sensitive devices. although this device contains circuitry to protect it from damage due to esd, precautions should be taken to avoid exceeding the rate specified in table 4. exposed solder pad connection the exposed solder pad on the bottom of the package must be grounded for proper device operation. figure 3. pin configuration (top view) pin no. pin name description 1 n/c no connect 2 v dd power supply pin 3 n/c no connect 4 rf1 rf port 5 n/c 5 no connect 6 acg 6 ac ground connection 7 acg 6 ac ground connection 8 acg 6 ac ground connection 9 acg 6 ac ground connection 10 acg 6 ac ground connection 11 acg 6 ac ground connection 12 n/c 7 no connect 13 acg 6 ac ground connection 14 n/c 5 no connect 15 rf2 rf port 16 n/c 5 no connect 17 n/c 5 no connect 18 n/c 5 no connect 19 c16 attenuation control bit, 16 db 20 c8 attenuation control bit, 8 db 21 c4 attenuation control bit, 4 db 22 c2 attenuation control bit, 2 db 23 c1 attenuation control bit, 1 db 24 c0.5 attenuation control bit, 0.5 db paddle gnd ground for proper operation latch-up avoidance unlike conventional cmos devices, ultracmos? devices are immune to latch-up. table 4. absolute maximum ratings table 3. operating ranges c16 c8 c4 c2 c1 c0.5 attenuation state 1 1 1 1 1 1 reference loss (il) 1 1 1 1 1 0 0.5 db 1 1 1 1 0 1 1 db 1 1 1 0 1 1 2 db 1 1 0 1 1 1 4 db 1 0 1 1 1 1 8 db 0 1 1 1 1 1 16 db 0 0 0 0 0 0 31.5 db table 6. truth table symbol parameter/conditions min max units v dd power supply voltage -0.3 6.0 v v i voltage on any dc input -0.3 6.0 v t st storage temperature range -65 150 c t op operating temperature range -40 85 c p in input power (50 ? ) 30 dbm v esd esd voltage (human body model) 2000 v parameter min typ max units v dd power supply voltage 3.0 3.3 5.5 v i dd power supply current 100 250 a p in input power (50 ? ) +24 dbm table 5. control voltage state bias condition low 0 to +1.0 vdc at 2 a (typ) high +2.0 to +5 vdc at 10 a (typ) notes: 5. for improved rf performance these no connect pins can be connected to rf ground. 6. pins can either be grounded directly or through coupling capacitors 7. pin can either be grounded or no connect the standard 3v or 5v cmos control logic is independent of supply voltage. t e l : +86-23 - 628 0 8 8 18 f ax: +86-23-6 2 80 5 284 ww w . s i patsa w . com / sawmkt@s i p at.com
product specification SP4309 page 3 of 8 figure 4. test circuit block diagram c16 c8 c4 c2 c1 c0.5 vdd vdd z=50 ohm z=50 ohm ect bp050-0024uj03 4x4 mlp 24 ld socket r1 0 ohm r1 0 ohm r6 10k r6 10k j2 smasm j2 smasm 1 2 r5 10k r5 10k j3 smasm j3 smasm 1 2 r4 dni r4 dni c4 100pf c4 100pf r3 10k r3 10k j1 cwn-350-14-0000 j1 cwn-350-14-0000 db1 1 gnd 2 db2 3 gnd 4 db3 5 gnd 6 db4 7 gnd 8 db5 9 gnd 10 db6 11 gnd 12 db7 13 gnd 14 r2 10k r2 10k c3 100pf c3 100pf c2 100pf c2 100pf c1 0.1f c1 0.1f u1 mlpq4x4_24l u1 mlpq4x4_24l nc 1 vdd 2 nc 3 rf1 4 nc 5 acg 6 acg 7 acg 8 acg 9 acg 10 acg 11 nc 12 acg 13 nc 14 rf2 15 nc 16 nc 17 nc 18 c16 19 c8 20 c4 21 c2 22 c1 23 c0.5 24 r7 10k r7 10k r8 10k r8 10k t e l : +86-23 - 628 0 8 8 18 f ax: +86-23-6 2 80 5 284 ww w . s i patsa w . com / sawmkt@s i p at.com
product specification SP4309 page 4 of 9 evaluation kit the digital attenuator evaluation kit board was designed to ease customer evaluation of the SP4309 digital step attenuator. connect j2 by mini clip to vdd to power the ic. connect j8 by mini clip to power the evaluation board support circuits. the control bits for the six parallel data inputs (c0.5 to c16) are controlled using s2-s7 to select bits or bit combinations. this allows any attenuation setting to be specified as shown in table 6. the de-embed trace (j6 to j7) estimates the pcb insertion loss for removal from the evaluation board measurement data. to evaluate using customer software, j1 can be installed using a standard 0.100 idc header (some circuit modification required, see schematic). the ability to supply different voltages for the control circuitry (using j8) and ic vdd (using j2) circuits allows for evaluation of circuits using different control vs. supply voltages. figure 5. evaluation board layout figure 6. evaluation board schematic t e l : +86-23 - 628 0 8 8 18 f ax: +86-23-6 2 80 5 284 ww w . s i patsa w . com / sawmkt@s i p at.com
product specification SP4309 page 5 of 9 typical performance data figure 8. attenuation at major steps figure 7. insertion loss, v dd = 3.0 v figure 9. input return loss at major attenuation steps figure 10. output return loss at major attenuation steps 31.5 db 4 db 8 db 16 db 31.5 db 16 db 31.5 db 2 db 1 db 0.5 db 16 db 0 db 0 db t e l : +86-23 - 628 0 8 8 18 f ax: +86-23-6 2 80 5 284 ww w . s i patsa w . com / sawmkt@s i p at.com
product specification SP4309 page 6 of 9 typical performance data figure 11. attenuation error vs. frequency 31.5 db 8 db 16 db figure 13. attenuation error vs. setting: high frequency figure 12. attenuation error vs. setting: low frequency t e l : +86-23 - 628 0 8 8 18 f ax: +86-23-6 2 80 5 284 ww w . s i patsa w . com / sawmkt@s i p at.com
product specification SP4309 page 7 of 8 figure 16. package drawing qfn 4x4 mm a max 0.900 nom 0.850 min 0.800 t e l : +86-23 - 628 0 8 8 18 f ax: +86-23-6 2 80 5 284 ww w . s i patsa w . com / sawmkt@s i p at.com
product specification SP4309 page 8 of 8 figure 18. marking specifications 4309 yyww zzzzz yyww = date code zzzzz = last five digits of lot number figure 17. tape and reel drawing t e l : +86-23 - 628 0 8 8 18 f ax: +86-23-6 2 80 5 284 ww w . s i patsa w . com / sawmkt@s i p at.com
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